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.rs .\" Troff code generated by TPS Convert from ITU Original Files .\" Not Copyright (~c) 1991 .\" .\" Assumes tbl, eqn, MS macros, and lots of luck. .TA 1c 2c 3c 4c 5c 6c 7c 8c .ds CH .ds CF .EQ delim @@ .EN .nr LL 40.5P .nr ll 40.5P .nr HM 3P .nr FM 6P .nr PO 4P .nr PD 9p .po 4P .rs \v'|.5i' .LP \fBMONTAGE: FIN DE LA RECOMMANDATION V.120 EN\(hyT\*\|ETE DE CETTE PAGE\fR .sp 2P .LP \v'34P' \fBRecommendation\ V.230\fR .RT .sp 2P .sp 1P .ce 1000 \fBGENERAL\ DATA\ COMMUNICATIONS\ INTERFACE\ LAYER\ 1\ SPECIFICATION\fR .EF '% Fascicle\ VIII.1\ \(em\ Rec.\ V.230'' .OF '''Fascicle\ VIII.1\ \(em\ Rec.\ V.230 %' .ce 0 .sp 1P .ce 1000 \fI(Melbourne, 1988)\fR .sp 9p .RT .ce 0 .sp 1P .LP \fB1\fR \fBGeneral\fR .sp 1P .RT .PP This Recommendation defines the layer 1 characteristics of a General Data Communications Interface (GDCI) between Data Circuit\(hyTerminating Equipment (DCE) and/or Data Terminal Equipment (DTE). Applications include DTE\(hyDCE interfaces, DCE\(hyDCE interfaces, and possible DTE\(hyDTE interfaces (see Figure\ 1/V.230). The interface specification is based on the ISDN basic .PP user\(hynetwork interface defined in Recommendation\ I.430. The differences between the GDCI and the ISDN basic user\(hynetwork interface provide for the different wiring configurations expected for these interfaces, and they provide a means by which equipment conforming to V.230 can identify whether it has been connected to an interface operating according to V.230 or to an interface operating according to I.430. The characteristics of the GDCI have been chosen so that it is possible to design terminals which are compatible with both I.430 and V.230, and so that inadvertent connection of I.430 equipment to a V.230 passive bus or of GDCI equipment to an I.430 passive bus will not result in passive bus malfunction. .PP \fINote\fR \ \(em\ DTE\(hyDTE interfaces are not defined by CCITT. .bp .RT .LP .rs .sp 23P .ad r \fBFigure\ 1/V.230, p.\fR .sp 1P .RT .ad b .RT .sp 2P .LP \fB2\fR \fBService characteristics\fR .sp 1P .RT .sp 1P .LP 2.1 \fIServices required from the physical medium\fR .sp 9p .RT .PP Layer 1 of this interface requires a balanced metallic transmission medium, for each direction of transmission, capable of supporting 192\ kbit/s. .RT .sp 1P .LP 2.2 \fIServices provided to layer 2\fR .sp 9p .RT .PP Layer 1 provides the following services to layer 2 and the management entity. .RT .sp 1P .LP 2.2.1 \fITransmission capability\fR .sp 9p .RT .PP Layer 1 provides the transmission capability, by means of appropriately encoded bit streams, for the BV and DV channels and the related timing and synchronization functions. .PP \fINote\fR \ \(em\ The BV and DV channels correspond to the B and D channels, respectively, as defined in the I\(hySeries Recommendations. Use of the BV and DV\ channels is defined in Recommendations\ V.yy and V.zz (V.yy and V.zz: still under study). .RT .sp 1P .LP 2.2.2 \fIActivation/deactivation\fR .sp 9p .RT .PP Layer 1 provides the signalling capability and the necessary procedures to enable equipment to be deactivated when required and reactivated when required. The activation and deactivation procedures are defined in \(sc\ 6.2. .RT .sp 1P .LP 2.2.3 \fID\(hychannel access\fR .sp 9p .RT .PP Layer 1 provides the signalling capability and the necessary procedures to enable equipment to gain access to the common resource of the DV channel in an orderly fashion while meeting the performance requirements of the DV\(hychannel signalling system. These DV\(hychannel access control procedures are defined in \(sc\ 6.1 .bp .RT .sp 1P .LP 2.2.4 \fIMaintenance\fR .sp 9p .RT .PP Layer 1 provides the signalling capability, procedures and necessary functions at layer\ 1 to enable the maintenance functions to be performed. .RT .sp 1P .LP 2.2.5 \fIStatus indication\fR .sp 9p .RT .PP Layer 1 provides an indication to the higher layers of the status of layer\ 1. .RT .sp 1P .LP 2.3 \fIPrimitives between layer 1 and other entities\fR .sp 9p .RT .PP Primitives represent, in an abstract way, the logical exchange of information and control between layer\ 1 and other entities. They neither specify nor constrain the implementation of entities or interfaces. .PP The primitives to be passed across the layer 1/2 boundary or to the management entity and parameter values associated with these primitives are defined and summarized in Table\ 1/V.230. For a description of the syntax and use of the primitives, refer to Recommendation\ X.211 and relevant detailed description in \(sc\ 6. .RT .ce \fBH.T. [T1.230]\fR .ce TABLE\ 1/V.230 .ce \fBPrimitives associated with layer 1\fR .ps 9 .vs 11 .nr VS 11 .nr PS 9 .TS center box; cw(54p) | cw(30p) sw(30p) | cw(30p) sw(30p) | cw(54p) , ^ | c | c | c | c | ^ . Generic name Specific name Parameter Message unit contents Request Indication Priority indicator Message unit _ .T& lw(54p) | lw(30p) | lw(30p) | lw(30p) | lw(30p) | lw(54p) . L1<\(em\(em>L2 _ .T& lw(54p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | lw(54p) . PH\(hyDATA X (Note\ 1) X X (Note\ 2) X T{ Layer\ 2 peer\(hyto\(hypeer message T} _ .T& lw(54p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | lw(54p) . PH\(hyACTIVATE X X \(em \(em _ .T& lw(54p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | lw(54p) . PH\(hyDEACTIVATE X X \(em \(em _ .T& lw(54p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | lw(54p) . M<\(em\(em>L1 _ .T& lw(54p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | lw(54p) . MPH\(hyERROR \(em X* \(em X T{ *Type of error or recovery from a previously reported error T} _ .T& lw(54p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | lw(54p) . MPH\(hyACTIVATE X X \(em \(em _ .T& lw(54p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | lw(54p) . MPH\(hyDEACTIVATE X X \(em \(em _ .T& lw(54p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | lw(54p) . MPH\(hyINFORMATION \(em X \(em X T{ Connected Attached V\(hyDCE Attached V\(hyDTE Attached NT Attached TE Disconnected T} .TE .LP \fINote\ 1\fR \ \(em\ PH\(hyData Request implies underlying negotiation between layer\ 1 and layer\ 2 for the acceptance of the data. .LP \fINote\ 2\fR \ \(em\ Priority indication applies only to the request type. .nr PS 9 .RT .ad r \fBTable\ 1/V.230 [T1.230], p.\fR .sp 1P .RT .ad b .RT .LP .bp .sp 2P .LP \fB3\fR \fBModes of operation\fR .sp 1P .RT .PP Both point\(hyto\(hypoint and point\(hyto\(hymultipoint modes of operation, as described below, are intended to be accommodated by the layer\ 1 characteristics of the GDCI. In this Recommendation, the modes of operation apply only to the layer\ 1 procedural characteristics of the interface and do not imply any constraints on modes of operation at higher layers. .RT .sp 1P .LP 3.1 \fIPoint\(hyto\(hypoint operation\fR .sp 9p .RT .PP Point\(hyto\(hypoint operation at layer\ 1 implies that only one source (transmitter) and one sink (receiver) are active at any one time in each direction of transmission at an S or T reference point. (Such operation is independent of the number of interfaces which may be provided on a particular wiring configuration \(em see \(sc\ 4.) .RT .sp 1P .LP 3.2 \fIPoint\(hyto\(hymultipoint operation\fR .sp 9p .RT .PP Point\(hyto\(hymultipoint operation at layer\ 1 allows more than one equipment (source and sink pair) to be simultaneously active at a GDCI. (The multipoint mode of operation may be accommodated, as discussed in \(sc\ 4, with point\(hyto\(hypoint or point\(hyto\(hymultipoint wiring configurations.) .RT .sp 2P .LP \fB4\fR \fBTypes of wiring configuration\fR .sp 1P .RT .PP The electrical characteristics of the GDCI are determined on the basis of certain assumptions about the various wiring configurations which may exist in the user premises. These assumptions are identified in two major configuration descriptions, \(sc\(sc\ 4.1 and\ 4.2, together with additional material contained in Annex\ A to this Recommendation. Figure\ 2/V.230 shows a general reference configuration for wiring in the user premises. .RT .LP .rs .sp 13P .ad r \fBFigure\ 2/V.230, p.\fR .sp 1P .RT .ad b .RT .sp 1P .LP 4.1 \fIPoint\(hyto\(hypoint configuration\fR .sp 9p .RT .PP A point\(hyto\(hypoint wiring configuration implies that only one source (transmitter) and one sink (receiver) are interconnected on an interchange circuit. .RT .sp 1P .LP 4.2 \fIPoint\(hyto\(hymultipoint configuration\fR .sp 9p .RT .PP A point\(hyto\(hymultipoint wiring configuration allows more than one source to be connected to the same sink or more than one sink to be connected to the same source on an interchange circuit. Such distribution systems are characterized by the fact that they contain no active logic elements performing functions (other than possibly amplification or regeneration of the signal). .PP The equipment connected to interface point I\dB\umust operate in the \*Qmaster timing mode\*U discussed in \(sc\ 6.6. This equipment is normally a V\(hyDCE. The equipment connected to interface points I\dA\\d0\uthrough I\dA\\dn\umust operate in the \*Qslave timing mode\*U. These are normally V\(hyDTEs, although a V\(hyDCE may be connected to this point to achieve a DCE\(hyto\(hyDCE connection on the GDCI. Use of a V\(hyDTE as the master timing mode equipment is for further study. .bp .RT .sp 1P .LP 4.3 \fIWiring polarity integrity\fR .sp 9p .RT .PP For a point\(hyto\(hypoint wiring configuration, the two wires of the interchange circuit pair may be reversed. However, for a point\(hyto\(hymultipoint wiring configuration, the wiring polarity integrity of the interchange circuit (slave\(hyto\(hymaster direction) must be maintained between slave mode equipment. .PP In addition, the wires of the optional pairs, which may be provided for powering, may not be reversed in either configuration. .RT .sp 1P .LP 4.4 \fILocation of the interfaces\fR .sp 9p .RT .PP The wiring in the user premises is considered to be one continuous cable run with jacks for the equipment attached directly to the cable or using stubs less than 1\ meter in length. The jacks are located at interface points I\dA\uand I\dB\u(see Figure\ 2/V.230). One interface point, I\dA\u, is adjacent to the master mode equipment. The other interface point, I\dB\u, is adjacent to the master mode equipment. However, in some applications, the equipment may be connected to the wiring without the use of a jack or with a jack which accommodates multiple interfaces. The required electrical characteristics (described in \(sc\ 8) for I\dA\uand I\dB\uare different in some aspects. .RT .sp 1P .LP 4.5 \fIWiring associated with the equipment\fR .sp 9p .RT .PP The wiring connecting the V\(hyDCE or V\(hyDTE to associated jacks or to other equipment affects the interface electrical characteristics. Equipment that is not permanently connected to the interface wiring may be equipped with one of the following means of connection to the interface point: .RT .LP \(em a hard wired connecting cord (of not more than 10 m in the case of a V\(hyDTE and not more than 3\ m in the case of a V\(hyDCE) equipped with a suitable plug, or .LP \(em a jack with a connecting cord (of not more than 10 m in the case of a V\(hyDTE and not more than 3\ m in the case of a V\(hyDCE) equipped with a suitable plug at each end, or .LP \(em two jacks with suitable connecting cords or cables which may be used to form a \*Qdaisy\(hychain\*U connection from one equipment unit to the next, provided that the connecting cords and cables meet the distance limitations set in Annex\ A. In this case, the electrical interface exists inside the equipment, where the two jacks are wired together with each pin on one jack connected to the like\(hynumbered pin on the other jack and to the internal circuitry of the equipment. .PP The requirements of V.230 apply to the interface point (I\dA\uor I\dB\u), and the cord forms part of the associated equipment. Note that the equipment may attach directly to the interface wiring without a detachable cord. .PP Although an equipment may be provided with a cord of less than 5 m in length, it shall meet the requirements of this Recommendation with a cord having a minimum length of 5\ m. As specified above, the equipment cord may be detachable. Such a cord may be provided as part of the equipment, or the equipment may be designed to conform to the electrical characteristics specified in \(sc\ 8 with a \*Qstandard ISDN basic access TE cord\*U conforming to the requirements specified in \(sc\ 8.9 of Recommendation\ I.430, and having the maximum permitted capacitance. .PP The use of an extension cord, of up to 25\ m in length, with an equipment in point\(hyto\(hypoint operation, is permitted. (The total attenuation of the wiring and of the cord in this case should not exceed 6\ dB.) .RT .sp 2P .LP \fB5\fR \fBFunctional characteristics\fR .sp 1P .RT .PP The following paragraphs show the functions for the interface. .RT .sp 2P .LP 5.1 \fIInterface functions\fR .sp 1P .RT .sp 1P .LP 5.1.1 \fIBV channel\fR .sp 9p .RT .PP This function provides, for each direction of transmission, two independent 64\ kbit/s channels for use as BV\ channels. .bp .RT .sp 1P .LP 5.1.2 \fIBit timing\fR .sp 9p .RT .PP This function provides bit (signal element) timing at 192\ kbit/s to enable the equipment to recover information from the aggregate bit stream. .RT .sp 1P .LP 5.1.3 \fIOctet timing\fR .sp 9p .RT .PP This function provides 8 kHz timing for the equipment. .RT .sp 1P .LP 5.1.4 \fIFrame alignment\fR .sp 9p .RT .PP This function provides information to enable equipment to recover the time division multiplexed channels. .RT .sp 1P .LP 5.1.5 \fIDV channel\fR .sp 9p .RT .PP This function provides, for each direction of transmission, one DV channel at a bit rate of 16\ kbit/s. .RT .sp 1P .LP 5.1.6 \fIDV channel access procedure\fR .sp 9p .RT .PP This function is specified to enable slave mode equipment to gain access to the common resource of the DV channel in an orderly controlled fashion. The functions necessary for these procedures include an echoed DV channel at a bit rate of 16\ kbit/s in the direction master to slave equipment. For the definition of the procedures relating to DV\ channel access, see \(sc\ 6.1. .RT .sp 1P .LP 5.1.7 \fIPower feeding .sp 9p .RT .PP This function provides for the capability to transfer power across the interface. The direction of power transfer depends on the application. In a typical application, it may be desirable to provide for power transfer from the V\(hyDCE towards V\(hyDTEs in order to, for example, power an adaptor for a unit which does not conform to V.230. (In some applications, unidirectional power feeding or no power feeding at all, across the interface, may apply.) Other Recommendations concerning power feeding capability are contained in \(sc\ 9. .RT .sp 1P .LP 5.1.8 \fIActivation and deactivation\fR .sp 9p .RT .PP Activation is necessary to initialize an equipment when power is applied, or when it is connected to the GDCI. Deactivation and activation may also be used to control entry to and exit from a low power consumption mode. The procedures and precise conditions under which these actions take place are specified in \(sc\ 6.2. For many applications, it will be appropriate for the equipment to remain in the active state at all times after initial activation. .RT .sp 1P .LP 5.2 \fIInterchange circuits\fR .sp 9p .RT .PP Two interchange circuits, one for each direction of transmission, shall be used to transfer digital signals across the interface. All of the functions described in \(sc\ 5.1, except for power feeding, shall be carried by means of a digitally multiplexed signal structured as defined in \(sc\ 5.4. .RT .sp 1P .LP 5.3 \fIConnected/disconnected indication\fR .sp 9p .RT .PP The criterion used by equipment to determine whether it is connected or disconnected at the interface is reception of valid incoming frames. .PP The layer\ 1 entity within the equipment shall inform the management entity of the connection status using the MPH\(hyINFORMATION INDICATION primitive. The method for determining the message unit contents is discussed in \(sc\ 6.2. .RT .sp 1P .LP 5.4 \fIFrame structure\fR .sp 9p .RT .PP In both directions of transmission, the bits shall be grouped into frames of 48\ bits each. The frame structure shall be identical for all configurations (point\(hyto\(hypoint and point\(hyto\(hymultipoint). .bp .RT .sp 1P .LP 5.4.1 \fIBit rate\fR .sp 9p .RT .PP The nominal transmitted bit rate at the interfaces shall be 192 kbit/s in both directions of transmission. .RT .sp 1P .LP 5.4.2 \fIBinary organization of the frame .sp 9p .RT .PP The frame structures are different for each direction of transmission. Both structures are illustrated diagramatically in Figure\ 3/V.230. .RT .LP .rs .sp 23P .ad r \fBFigure 3/V.230, p. 4\fR .sp 1P .RT .ad b .RT .sp 1P .LP 5.4.2.1 \fISlave to master\fR .sp 9p .RT .PP Each frame consists of the following groups of bits; each individual group is DC\(hybalanced by its last bit (L\ bit): .RT .LP \fIBit position\fR \fIGroup\fR .LP 1 and 2 framing signal with balance bit .LP 3\(hy11 BV1 channel (first octet) with balance bit .LP 12 and 13 DV\(hychannel bit with balance bit .LP 14 and 15 F\dA\uauxiliary framing bit or Q bit with balance bit .LP 16\(hy24 BV2 channel (first octet) with balance bit .LP 25 and 26 DV\(hychannel bit with balance bit .LP 27\(hy35 BV1 channel (second octet) with balance bit .LP 36 and 37 DV\(hychannel bit with balance bit .LP 38\(hy46 BV2 channel (second octet) with balance bit .LP 47 and 48 DV channel bit with balance bit .bp .sp 1P .LP 5.4.2.2 \fIMaster to slave\fR .sp 9p .RT .PP Frames transmitted by the master contain an echo channel (E bits) used to retransmit the DV bits received from the slaves. The DV\(hyecho channel is used for DV\(hychannel access control. The last bit of the frame (L\ bit) is used for balancing each complete frame. .PP The bits are grouped as follows: .RT .LP \fIBit position\fR \fIGroup\fR .LP 1 and 2 framing signal with balance bit .LP 3\(hy10 BV1 channel (first octet) .LP 11 E, DV\(hyecho\(hychannel bit .LP 12 DV\(hychannel bit .LP 13 bit A used for activation .LP 14 F\dA\uauxiliary framing bit .LP 15 N bit (coded as defined in \(sc\ 6.3) .LP 16\(hy23 BV2 channel (first octet) .LP 24 E, DV\(hyecho\(hychannel bit .LP 25 DV\(hychannel bit .LP 26 M, multiframing bit .LP 27\(hy34 BV1 channel (second octet) .LP 35 E, DV\(hyecho\(hychannel bit .LP 36 DV\(hychannel bit .LP 37 S, layer\ 1 multiframe channel bit .LP 38\(hy45 BV2 channel (second octet) .LP 46 E, DV\(hyecho\(hychannel bit .LP 47 DV\(hychannel bit .LP 48 frame balance bit .sp 1P .LP 5.4.2.3 \fIRelative bit positions\fR .sp 9p .RT .PP At the slave mode equipment, timing in the direction to the master mode equipment shall be derived from the frames received from the master mode equipment. .PP The first bit of each frame transmitted from a slave equipment towards the master equipment shall be delayed, nominally, by two bit periods with respect to the first bit of the frame received from the master equipment. Figure\ 3/V.230 illustrates the relative bit positions for both transmitted and received frames. .RT .sp 1P .LP 5.5 \fILine code\fR .sp 9p .RT .PP For both directions of transmission, pseudo\(hyternary coding is used with 100% pulse width as shown in Figure\ 4/V.230. Coding is performed in such a way that a binary ONE is represented by no line signal; whereas, a binary ZERO is represented by a positive or negative pulse. The first binary ZERO following the framing balance bit is of the same polarity as the framing balance bit. Subsequent binary ZEROs must alternate in polarity. A balance bit is a binary ZERO if the number of binary ZEROs following the previous balance bit is odd. A balance bit is a binary ONE if the number of binary ZEROs following the previous balance bit is even. .RT .LP .rs .sp 10P .ad r \fBFigure\ 4/V.230, p.\fR .sp 1P .RT .ad b .RT .LP .bp .sp 1P .LP 5.6 \fITiming considerations\fR .sp 9p .RT .PP Equipment may employ one of two timing sources, if available, for transmission of frames across the interface: .RT .LP \(em timing derived from an internal source or from an external source conveyed to the equipment by other means (e.g.\ timing derived from the receive line timing by a V\(hyDCE). This is referred to as \*Qmaster timing mode\*U. Exactly one equipment on a GDCI bus must operate in this mode. .LP \(em timing derived from the receive side of the interface (\*Q loopback timing \*U). This is referred to as \*Qslave timing mode \*U. .sp 2P .LP \fB6\fR \fBInterface procedures\fR .sp 1P .RT .sp 1P .LP 6.1 \fIDV\(hychannel access procedure\fR .sp 9p .RT .PP The following procedure allows for a number of slave mode equipments connected in a multipoint configuration to gain access to the DV channel in an orderly fashion. The procedure always ensures that, even in cases where two or more equipments attempt to access the DV channel simultaneously, one, but only one, of the equipments will be successful in completing transmission of its information. This procedure relies upon the use of layer\ 2 frames delimited by flags consisting of the binary pattern \*Q01111110\*U and the use of zero bit insertion to prevent flag imitation (see Recommendation\ I.441). .PP The procedure also permits equipment to operate in a point\(hyto\(hypoint manner. .RT .sp 1P .LP 6.1.1 \fIInterframe (layer\ 2) time fill\fR .sp 9p .RT .PP When a slave mode equipment has no layer\ 2 frames to transmit, it shall send binary ONEs on the DV channel, i.e., the interframe time fill in the slave\(hyto\(hymaster direction shall be all binary ONEs. .PP When a master timing mode equipment has no layer\ 2 frames to transmit, it shall send binary ONEs or HDLC flags on the DV channel, i.e.,\ the interframe time fill in the master\(hyto\(hyslave direction shall be either all binary ONEs or repetitions of the octet \*Q01111110\*U. When the interframe time fill is HDLC flags, the flag which defines the end of a frame may define the start of the next frame. .RT .sp 1P .LP 6.1.2 \fID\(hyecho channel\fR .sp 9p .RT .PP The master timing mode equipment, on receipt of a DV\(hychannel bit, shall reflect the binary value, in the next available DV\(hyecho\(hychannel bit position towards the slave mode equipment. .RT .sp 1P .LP 6.1.3 \fIDV\(hychannel monitoring\fR .sp 9p .RT .PP Slave mode equipment, while in the active condition, shall monitor the DV\(hyecho channel, counting the number of consecutive binary ONEs. If a ZERO bit is detected, the equipment shall restart counting the number of consecutive ONE bits. The current value of the count is called\ C. .PP \fINote\fR \ \(em\ C need not be incremented after the value eleven has been reached. .RT .sp 1P .LP 6.1.4 \fIPriority mechanism\fR .sp 9p .RT .PP Layer 2 frames are transmitted using one of two priority classes. Priority class\ 1 frames are given priority over priority class\ 2 frames. Furthermore, to ensure that within each priority class all competing equipments are given a fair access to the DV\ channel, once an equipment has successfully completed the transmission of a frame, it is given a lower level of priority within that class. The equipment is given back its normal level within a priority class when all equipments have had an opportunity to transmit information at the normal level within that priority class. .bp .PP The priority class of a particular layer 2 frame may be a characteristic of the equipment which is preset at manufacture or at installation, or it may be passed down from layer\ 2 as a parameter of the PH\(hyDATA REQUEST primitive. A dual mode (GDCI/ISDN) terminal may thus use the PH\(hyDATA REQUEST primitive to establish the proper priorities for its operation. .PP The priority mechanism is based on the requirement that slave mode equipment may start layer\ 2 frame transmission only when C (see \(sc\ 6.1.3) is equal to, or exceeds, the value \fIX\fR\d1\ufor priority class\ 1 or is equal to, or exceeds, the value \fIX\fR\d2\ufor priority class\ 2. The value of \fIX\fR\d1\ushall be eight for the normal level and nine for the lower level of priority. The value of \fIX\fR\d2\ushall be ten for the normal level and eleven for the lower level of priority. .PP In a priority class, the value of the normal level of priority is changed into the value of the lower level of priority (i.e.,\ higher value) when the equipment has successfully transmitted a layer\ 2 frame of that priority class. .PP The value of the lower level of priority is changed back to the value of the normal level of priority when C (see \(sc\ 6.1.3) equals the value of the lower level of priority (i.e.,\ higher value). .RT .sp 1P .LP 6.1.5 \fICollision detection\fR .sp 9p .RT .PP While transmitting information in the DV channel, slave mode equipment shall monitor the received DV\(hyecho channel and compare the last transmitted bit with the next available DV\(hyecho bit. If the transmitted bit is the same as the received echo, the equipment shall continue its transmission. If, however, the received echo is different from the transmitted bit, the equipment shall cease transmission immediately and return to the DV\(hychannel monitoring state. .RT .sp 1P .LP 6.1.6 \fIPriority system\fR .sp 9p .RT .PP Annex B describes an example of how the priority system may be implemented. .RT .LP 6.2 \fIActivation/deactivation\fR .sp 1P .RT .sp 2P .LP 6.2.1 \fIDefinitions\fR .sp 1P .RT .sp 1P .LP 6.2.1.1 \fISlave mode equipment states (normally DTE)\fR \v'3p' .sp 9p .RT .LP 6.2.1.1.1\ \ State F1 (inactive): In this inactive state, the equipment is not transmitting. This state is entered upon loss of power. .LP 6.2.1.1.2\ \ State F2 (sensing): This state is entered after the equipment has been powered on, but has not determined the type of signal (if any) being received. .LP 6.2.1.1.3\ \ State F3 (deactivated): This is the deactivated state of the physical protocol. Neither the master nor the slave equipment is transmitting. .LP 6.2.1.1.4\ \ State F4 (awaiting signal): When the equipment is requested to initiate activation by means of an ACTIVATE REQUEST primitive, it transmits a signal (INFO\ 1) and waits for a response. .LP 6.2.1.1.5\ \ State F5 (identifying input): At the first receipt of any signal from the master mode equipment, the slave mode equipment ceases to transmit INFO\ 1 and awaits identification of signal INFO\ 2 or INFO\ 4. .LP 6.2.1.1.6\ \ State F6 (synchronized): When the equipment receives an activation signal (INFO\ 2) from the master, it responds with a signal (INFO\ 3) and waits for normal frames (INFO\ 4). .LP 6.2.1.1.7\ \ State F7 (identifying interface): This is a transition state during entry to normal activation. When this state is entered, a timer (T4) is started, and the appropriate (DTE or DCE) identification character is transmitted on the multiframe Q\ channel. This state continues until either a V\(hyseries identification character is received on the multiframe S\ channel or T4 times out. .LP 6.2.1.1.8\ \ State F8 (lost framing): This is the condition where the equipment has lost frame synchronization and is awaiting re\(hysynchronization by receipt of INFO\ 2 or INFO\ 4 or deactivation by receipt of INFO\ 0. .LP 6.2.1.1.9\ \ State F9 (activated): This is the normal active state with the protocol activated in both directions. Both the master and slave mode equipments are transmitting normal frames. .bp .sp 2P .LP 6.2.1.2 \fIMaster mode equipment states (normally DCE)\fR .sp 1P .RT .sp 1P .LP 6.2.1.2.1\ \ State G1 (deactive): In this deactivated state, the equipment is not transmitting. .sp 9p .RT .LP 6.2.1.2.2\ \ State G2 (pending activation): In this partially active state, the master mode equipment sends INFO\ 2 while waiting for INFO\ 3. This state will be entered after receiving an ACTIVATE REQUEST primitive, or on the receipt of INFO\ 0 or lost framing while in state\ G3 or\ G5. Then the choice to eventually deactivate is up to higher layers within the equipment. .LP 6.2.1.2.3\ \ State G3 (identifying interface): This is a transition state during entry to normal activation. When this state is entered, a timer (T4) is started, and the appropriate (DTE or DCE) identification character is transmitted on the multiframe S\ channel. This state continues until either a V\(hyseries identification (DTE or DCE) is received on the multiframe Q\ channel or T4 times out. .LP 6.2.1.2.4\ \ State G4 (pending deactivation): When the equipment wishes to deactivate, it may wait for a timer to expire before returning to the deactivated state. .LP 6.2.1.2.5\ \ State G5 (active): This is the normal active state where the master and slave mode equipment are transmitting INFO\ 4 and INFO\ 3 respectively. A deactivation may be initiated by a DEACTIVATE REQUEST primitive, or the equipment may remain in the active state all the time, under non\(hyfault conditions. .sp 1P .LP 6.2.1.3 \fIActivate primitives\fR .sp 9p .RT .PP The following primitives should be used between layers\ 1 and 2 and between layer\ 1 and the management entity in the activation procedures. For use in state diagrams,\ etc., abbreviations of the primitive names are also given. .RT .LP PH\(hyACTIVATE REQUEST (PH\(hyAR) .LP PH\(hyACTIVATE INDICATION (PH\(hyAI) .LP MPH\(hyACTIVATE REQUEST (MPH\(hyAR) .LP MPH\(hyACTIVATE INDICATION (MPH\(hyAI) .sp 1P .LP 6.2.1.4 \fIDeactivate primitives\fR .sp 9p .RT .PP The following primitives should be used between layers 1 and 2 and between layer\ 1 and the management entity in the deactivation procedures. For use in state diagrams,\ etc., abbreviations of the primitive names are also given. .RT .LP MPH\(hyDEACTIVATE REQUEST (MPH\(hyDR) .LP MPH\(hyDEACTIVATE INDICATION (MPH\(hyDI) .LP PH\(hyDEACTIVATE REQUEST (PH\(hyDR) .LP PH\(hyDEACTIVATE INDICATION (PH\(hyDI) .sp 1P .LP 6.2.1.5 \fIManagement primitives\fR .sp 9p .RT .PP The following primitives should be used between layer 1 and the management entity. For use in state diagrams,\ etc., abbreviations of the primitive names are also given. .RT .LP MPH\(hyERROR INDICATION (MPH\(hyEI) .LP Message unit contains type of error or recovery from a previously reported error. .LP MPH\(hyINFORMATION INDICATION (MPH\(hyII) .LP Message unit contains information regarding the physical layer conditions. The provisionally defined parameters are: connected, disconnected, attached DTE, attached DCE, attached TE, and attached NT. .PP \fINote\fR \ \(em\ Implementation of primitives in equipment is not for recommendation. .sp 1P .LP 6.2.2 \fISignals\fR .sp 9p .RT .PP The identifications of specific signals across the GDCI are given in Table\ 2/V.230. Also included is the coding for these signals. .bp .RT .ce \fBH.T. [T2.230]\fR .ce TABLE\ 2/V.230 .ce \fBDefinition of INFO signals \fR .ce (Note 1) .ps 9 .vs 11 .nr VS 11 .nr PS 9 .TS center box; cw(114p) | cw(114p) . Signals from MASTER TO SLAVE Signals from SLAVE TO MASTER _ .T& lw(30p) | lw(84p) | lw(30p) | lw(84p) . INFO 0 No signal INFO 0 No signal .T& lw(30p) | lw(84p) | lw(30p) | lw(84p) . INFO 1 (Note 2) T{ A continuous signal with the following pattern: Positive ZERO, negative ZERO, six ONEs \fBMONTAGE Figure CCITT 62731\fR Nominal bit rate\ = 192\ kbit/s \fR T} .T& lw(30p) | lw(84p) | lw(30p) | lw(84p) . INFO 2 (Note\ 3) T{ Frame with all bits of BV, DV and DV\(hyecho channels set to binary ZERO. Bit A set to binary ZERO. N and L bits set according to the normal coding rules. T} .T& lw(30p) | lw(84p) | lw(30p) | lw(84p) . INFO 3 T{ Synchronized frames with operational data on BV and DV channels. T} .T& lw(30p) | lw(84p) | lw(30p) | lw(84p) . INFO 4 (Note\ 3) T{ Frames with operational data on BV, DV and DV\(hyecho channels. Bit A set to binary ONE. T} .TE .LP \fINote\ 1\fR \ \(em\ For configurations where the wiring polarity may be reversed (see\ \(sc\ 4.3) signals may be received with the polarity of the binary ZEROs inverted. All receivers should be designed to tolerate wiring polarity reversals. .LP \fINote\ 2\fR \ \(em\ Slave mode equipment which does not need the capability to initiate activation of a deactivated V.230 interface need not have the capability to send INFO\ 1. In all other respects, this equipment shall be in accordance with \(sc\ 6.2. It should be noted that in the point\(hyto\(hymultipoint configuration more that one slave mode equipment transmitting simultaneously will produce a bit pattern, as received by the master mode equipment, different from that described above, e.g., two or more overlapping (asynchronous) intances of INFO\ 1. .LP \fINote\ 3\fR \ \(em\ During the transmission of INFO\ 2 or INFO\ 4, the F bits and the M/bits from the master mode equipment provide the Q\(hybit pattern designation as described in \(sc\ 6.3.3. .nr PS 9 .RT .ad r \fBTable\ 2/V.230 [T2.230], p.\fR .sp 1P .RT .ad b .RT .sp 2P .LP 6.2.3 \fIActivation/deactivation procedure for slave mode equipment\fR .sp 1P .RT .sp 1P .LP 6.2.3.1 \fIGeneral procedures\fR .sp 9p .RT .PP All slave mode equipment conforms to the following procedures (these statements are an aid to understanding; the complete procedures are specified in \(sc\ 6.2.3.2): .RT .LP a) Equipment, when first connected, when power is applied, or upon the loss of frame alignment (see \(sc\ 6.3.1.1) shall transmit INFO\ 0. However, an equipment that is disconnected but powered could be transmitting INFO\ 1 when connected. .LP b) Equipment transmits INFO\ 3 when frame alignment is established (see \(sc\ 6.3.1.2). However, the satisfactory transmission of operational data cannot be assured prior to the receipt of INFO\ 4. .LP c) Equipment shall, when power is removed, initiate the transmission of INFO\ 0 before frame alignment is lost. .sp 1P .LP 6.2.3.2 \fISpecification of the procedure\fR .sp 9p .RT .PP The procedure for equipment to follow during activitation/deactivation is shown in the form of a finite state matrix Table\ 3/V.230. The use of the primitives at the layer\ 1/2 boundary and at the layer\ 1/management entity boundary are also included. Those primitives serve to identify the connection status, and to identify whether other equipment connected to the passive bus is operating according to V.230 or I.430. .bp .RT .ce \fBH.T. [1T3.230]\fR .ps 9 .vs 11 .nr VS 11 .nr PS 9 .TS center box; cw(330p) . TABLE\ 3/V.230 .T& cw(330p) . T{ \fBActivation/deactivation layer\ 1 finite state matrix for \fR \fBGDCI slave (DTE)\fR T} .T& cw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . \| \| \| \| \| \| \| \| \| \| .T& rw(43p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . State name Inactive Seizing Deactivated Awaiting signal Identifying input Synchronized Identifying interface Lost framing Activated .T& lw(301p) . .T& rw(34p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . State number F1 F2 F3 F4 F5 F6 F7 F8 F9 .T& lw(292p) . .T& lw(48p) | rw(24p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Event \| \| \| \| \| \| INFO sent INFO 0 INFO 0 INFO 0 INFO 1 INFO 0 INFO 3 INFO 3 INFO 0 INFO 3 .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Loss of power / F1 MPH\(hyII(d); F1 T{ MPH\(hyII(d), MPH\(hyDI, PH\(hyDI; F1 T} T{ MPH\(hyII(d), MPH\(hyDI, PH\(hyDI; F1 T} T{ MPH\(hyII(d), MPH\(hyDI, PH\(hyDI; F1 T} T{ MPH\(hyII(d), MPH\(hyDI, PH\(hyDI; F1 T} T{ MPH\(hyII(d), MPH\(hyDI, PH\(hyDI; F1 T} T{ MPH\(hyII(d), MPH\(hyDI, PH\(hyDI; F1 T} _ .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . App. of power F2 / / / / / / / / .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . T{ MPH\(hyAct. Req. or PH\(hyAct. Req. T} / | ST.T3 F4 | | \(em | \(em | .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Expiry T3 / / \(em MPH\(hyDI, PH\(hyDI; F3 MPH\(hyDI, PH\(hyDI; F3 MPH\(hyDI, PH\(hyDI; F3 \(em \(em \(em .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Rec. INFO 0 / MPH\(hyII(c); F3 \(em \(em \(em MPH\(hyDI, PH\(hyDI; F3 MPH\(hyDI, PH\(hyDI; F3 T{ MPH\(hyDI, PH\(hyDI, MPH\(hyEI2; F3 T} MPH\(hyDI, PH\(hyDI; F3 _ .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Rec. any signal (Note\ 1) / \(em \(em F6 \(em / / \(em / _ .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Rec. INFO\ 2 / MPH\(hyII(c); F6 F6 / F6 \(em MPH\(hyEI1; F6 MPH\(hyEI2; F6 MPH\(hyEI1; F6 _ .TE .nr PS 9 .RT .ad r \fBTableau 3/V.230 [1T3.230], p. 7 \ \ \ \ \ A L'ITALIENNE\fR .sp 1P .RT .ad b .RT .LP .bp .ce \fBH.T. [2T3.230]\fR .ps 9 .vs 11 .nr VS 11 .nr PS 9 .TS center box; cw(330p) . T{ TABLE\ 3/V.230\ \fI(cont.)\fR T} .T& cw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . \| \| \| \| \| \| \| \| \| \| .T& rw(43p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . State name Inactive Seizing Deactivated Awaiting signal Identifying input Synchronized Identifying interface Lost framing Activated .T& lw(301p) . .T& rw(34p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . State number F1 F2 F3 F4 F5 F6 F7 F8 F9 .T& lw(292p) . .T& lw(48p) | rw(24p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Event \| \| \| \| \| \| INFO sent INFO 0 INFO 0 INFO 0 INFO 1 INFO 0 INFO 3 INFO 3 INFO 0 INFO 3 .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Rec. INFO 4 (Note\ 2) / T{ MPH\(hyII(c), MF\(hyQ, ST.T4; F7 T} Send MF\(hyQ ST.T4; F7 / Send MF\(hyQ ST.T4; F7 T{ MPH\(hyEI2, Send MF\(hyQ, ST.T4; F7 T} \(em T{ MPH\(hyEI2, Send MF\(hyQ, ST.T4; F7 T} \(em _ .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Rec. MF\(hyS (DTE) / / / / / / T{ PH\(hyAI, MPH\(hyAI, MPH\(hyII (a\(hyDTE); F9 T} / Send MF\(hyQ; \(em _ .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Rec. MF\(hyS(DCE) / / / / / / T{ PH\(hyAI, MPH\(hyAI, MPH\(hyII (a\(hyDCE); F9 T} / Send MF\(hyQ; \(em _ .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Expiry T4 \(em \(em \(em \(em \(em \(em T{ PH\(hyAI, MPH\(hyAI, MPH\(hyII (a\(hyNT); F9 T} \(em \(em _ .T& lw(72p) | cw(24p) | cw(24p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) | cw(30p) . Lost framing / / / / / MPH\(hyEI1; F8 MPH\(hyEI1; F8 \(em MPH\(hyEI1; F8 _ .TE .nr PS 9 .RT .ad r \fBTableau 3/V.230 [2T3.230], p. 8 \ \ \ A L'ITALIENNE\fR .sp 1P .RT .ad b .RT .LP .bp .ce \fBH.T. [3T3.230]\fR .ps 9 .vs 11 .nr VS 11 .nr PS 9 .TS center box; lw(330p) . \(em No change, no action | Impossible by the definition of the layer\ 1 service \fB\fR / Impossible situation a, b; Fn Issue primitives or take actions \*Qa\*U and \*Qb\*U and then go to state \*QFn\*U PH\(hyAI Primitive PH \(hy ACTIVATE INDICATION PH\(hyDI Primitive PH \(hy DEACTIVATE INFORMATION MPH\(hyAI Primitive MPH \(hy ACTIVATE INDICATION MPH\(hyDI Primitive MPH \(hy DEACTIVATE INDICATION MPH\(hyEI1 Primitive MPH \(hy ERROR INDICATION REPORTING ERROR MPH\(hyEI2 Primitive MPH \(hy ERROR INDICATION REPORTING RECOVERY MPH\(hyII(c) Primitive MPH \(hy INFORMATION INDICATION (connected) MPH\(hyII(d) Primitive MPH \(hy INFORMATION INDICATION (disconnected) MPH\(hyII(a\(hyDCE) Primitive MPH \(hy INFORMATION INDICATION (attached, V\(hyseries DCE) MPH\(hyII(a\(hyDTE) Primitive MPH \(hy INFORMATION INDICATION (attached, V\(hyseries DTE) MPH\(hyII(a\(hyNT) Primitive MPH \(hy INFORMATION INDICATION (attached, I\(hyseries NT) MF\(hyQ Multiframe V\(hyseries equipment ID on Q\(hychannel (either DTE or DCE ID) MF\(hyS Multiframe V\(hyseries equipment ID on Q\(hychannel ST.T3 Start timer T3 ST.T4 Start timer T4 .TE .LP Primitives are signals in a conceptual queue and will be cleared on recognition, while the INFO signals are continuous signals which are available all the time. The multiframe signals must be sent for a fixed number of multiframe periods, provisionally 6 periods. .LP \fINote\ 1\fR \ \(em\ This event reflects the case where a signal is received and the equipment has not (yet) determined whether it is INFO\ 2 or INFO\ 4. .LP \fINote\ 2\fR \ \(em\ Timer 4 (T4) is a supervisory timer which provides for the master timing mode equipment(s) to recognize the multiframe identification signal and reply. If no reply is received before T4 times out, connection to an I\(hyseries NT is assumed. The value of T4 is provisionally 500 ms. .RT .ad r \fBTableau 3/V.230 [3T3.230], p. 9 \ \ \ A L'ITALIENNE\fR .sp 1P .RT .ad b .RT .LP .bp .sp 2P .LP 6.2.4 \fIActivation/deactivation for master mode equipment .sp 1P .RT .sp 1P .LP 6.2.4.1 \fIActivating/deactivating equipment\fR .sp 9p .RT .PP The procedure is shown in the form of a finite state matrix Table\ 4/V.230. The primitives at the layer\ 1/2 boundary and layer\ 1/management entity boundary are also shown. Those primitives serve to identify the connection status, and to identify whether other equipment connected to the passive bus is operating according to V.230 or I.430. .RT .sp 1P .LP 6.2.4.2 \fINon\(hyactivating/non\(hydeactivating equipment\fR .sp 9p .RT .PP The behaviour of such equipment is the same as that of an activating/deactivating equipment never receiving DEACTIVATE REQUEST primitive. States\ G1 (deactive), G4 (pending deactivation) and timers\ 1 and\ 2 may not exist for such equipment. .RT .sp 1P .LP 6.2.5 \fITimer values\fR .sp 9p .RT .PP Timers are defined in the finite state matrix tables for both the master and slave mode GDCI equipment. The following values are defined for timers: .RT .LP \(em Timer 1 in master mode equipment: values from 2\ s (for GDCI only application) to 30\ s (for dual mode GDCI or ISDN application) are acceptable. .LP \(em Timer 2 in master mode equipment: values from 25 to 100\ ms are acceptable. The value may be zero if the equipment does not provide for deactivation. .LP \(em Timer 3 in slave mode equipment: value must be selected longer than the worst case time to activate the equipment. The value should be at least one second longer than the value of T1 in the master equipment connected to the GDCI. .LP \(em Timer 4: This is the time allowed for other equipment in the GDCI to recognize a V\(hyseries equipment ID on the multiframe (S or Q)\ channel and to respond. This should normally take less than 30\ ms, so the value of T4 is provisionally set to 50\ ms. .sp 1P .LP 6.2.6 \fIActivation and deactivation times\fR .sp 9p .RT .PP Slave mode equipment in the deactivated state (F3) shall, upon receipt of INFO\ 2, establish frame synchronization and begin transmission of INFO\ 3 within 100\ ms. It shall recognize receipt of INFO\ 4 within two frames (in the absence of errors). .PP Slave mode equipment in the \*Qwaiting for signal\*U state (F4) shall, upon the receipt of INFO\ 2, cease the transmission of INFO\ 1 and initiate the transmission of INFO\ 0 within 5\ ms and then respond to INFO\ 2, within 100\ ms, as above. (Note that in Table\ 3/V.230, the transition from\ F4 to\ F5 is indicated as the result of the receipt of \*Qany signal\*U which is in recognition of the fact that the equipment may not know that the signal being received is INFO\ 2 until after it has recognized the presence of a signal.) .PP Master mode equipment use of the \*Qdeactivated\*U and \*Qpending activation\*U states remains a topic for future study. If these states and transitions are implemented, the timing recommendations of I.430 \(sc\ 6.2.6.2 should be followed. .RT .sp 1P .LP 6.2.7 \fIMultiframe identification codes\fR .sp 9p .RT .PP Two characters must be selected from the unassigned values on the multiframe Q channel to identify a V\(hyseries DTE and a V\(hyseries DCE operating in the slave timing mode. Similarly, one character must be selected from the unassigned values on the multiframe S\ channel (SC1) to identify a V\(hyseries DCE operating in the master timing mode. .PP Since there are only 16 characters available on each of these multiframe channels, the selection must be done carefully. The following character codes have provisionally been selected for the purpose of identifying V\(hyseries equipment using a GDCI: .RT .LP Value\ (S\d1\\d1\uS\d1\\d2\uS\d1\\d3\uS\d1\\d4\u\ or\ Q\d1\uQ\d2\uQ\d3\uQ\d4\u) Meaning 1101 on Q channel V\(hyDTE, slave mode 1100 on Q channel V\(hyDCE, slave mode 0110 on S channel V\(hyDCE, master mode .PP \fINote\fR \ \(em\ These codes are unassigned in the current US Draft Specification. .bp .ce \fBH.T. [1T4.230]\fR .ce TABLE\ 4/V.230 .ce \fBActivation/deactivation layer\ 1 finite state matrix for .ce \fBCDCI master (DCE)\fR .T& lw(48p) | lw(36p) | lw(36p) | lw(36p) | lw(36p) | lw(36p) . .T& lw(48p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) . T{ MPH\(hyAct. Req. or PH\(hyAct. Req. T} Start\ T1; G2 | | Start\ T1; G2 | _ .T& lw(48p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) . T{ MPH\(hyDeact. Req. or PH\(hyDeact. Req. T} | Start\ T2; PH\(hyDI; G4 Start\ T2; PH\(hyDI; G4 | Start\ T2; PH\(hyDI; G4 .T& lw(48p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) . Expiry\ T1 (Note\ 1) \(em Start\ T2; PH\(hyDI; G4 / \(em / _ .T& lw(48p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) . Expiry\ T2 (Note\ 2) \(em \(em \(em G1 \(em .T& lw(48p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) . Rec. INFO 0 \(em \(em MPH\(hyDI, MPH\(hyEI; G2 G1 MPH\(hyDI, MPH\(hyEI; G2 _ .T& lw(48p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) . Rec. INFO 1 Start T1; G2 \(em / \(em / _ .T& lw(48p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) . Rec. INFO 3 / T{ Stop T1, Start T4, Send MF\(hyS; G3 (Note\ 3) T} \(em \(em \(em _ .T& lw(48p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) . Rec. MF\(hyQ (DTE) / / T{ PH\(hyAI, MPH\(hyAI, MPH\(hyII(a\(hyDTE); G5 T} \(em Send MF\(hyS; \(em _ .T& lw(48p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) . Rec. MF\(hyQ (DCE) / / T{ PH\(hyAI, MPH\(hyAI, MPH\(hyII(a\(hyDCE); G5 T} \(em Send MF\(hyS; \(em _ .T& lw(48p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) . Expiry T4 \(em \(em T{ PH\(hyAI, MPH\(hyAI, MPH\(hyII(a\(hyTE); G5 T} \(em \(em _ .T& lw(48p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) | cw(36p) . Lost framing / / MPH\(hyDI, MPH\(hyEI; G2 \(em MPH\(hyDI, MPH\(hyEI; G2 _ .TE .nr PS 9 .RT .ad r \fBTableau 4/V.230 [1T4.230], p.\fR .sp 1P .RT .ad b .RT .LP .bp .ce \fBH.T. [2T4.230]\fR .ps 9 .vs 11 .nr VS 11 .nr PS 9 .TS center box; lw(228p) . T{ \(em No change, no action .LP | Impossible by the definition of the layer\ 1 service .LP / Impossible situation .LP a, b; Gn Issue primitives or take actions \*Qa\*U and \*Qb\*U then go to state \*QGn\*U .LP PH\(hyAI Primitive PH \(hy ACTIVATE INDICATION .LP PH\(hyDI Primitive PH \(hy DEACTIVATE INDICATION .LP MPH\(hyAI Primitive MPH \(hy ACTIVATE INDICATION .LP MPH\(hyDI Primitive MPH \(hy DEACTIVATE INDICATION .LP MPH\(hyEI Primitive MPH \(hy ERROR INDICATION REPORTING ERROR .LP MPH\(hyII(a\(hyDCE) Primitive MPH \(hy INFORMATION INDICATION (attached, V\(hyseries DCE) .LP MPH\(hyII(a\(hyDTE) Primitive MPH \(hy INFORMATION INDICATION (attached, V\(hyseries DTE) .LP MPH\(hyII(a\(hyTE) Primitive MPH \(hy INFORMATION INDICATION (attached, I\(hyseries TE) .LP MF\(hyS Multiframe V\(hyseries equipment ID on S\(hychannel (currently only a DCE ID is defined) .LP MF\(hyQ Multiframe V\(hyseries equipment ID on Q\(hychannel (DCE or DTE) Primitives are signals in a conceptual queue and will be cleared on recognition, while the INFO signals are continuous signals which are available all the time. The multiframe signals must be sent for a fixed number of multiframe periods, provisionally 6 periods. .LP \fINote\ 1\fR \ \(em\ Timer\ 1 (T1) is a supervisory timer which has to take into account the overall time to activate. .LP \fINote\ 2\fR \ \(em\ Timer 2 (T2) prevents unintentional reactivation. Its value is normally between 25\ ms and 100\ ms. This implies that a slave timing mode equipment must recognize INFO\ 0 and react on it within 25\ ms. If the master timing mode equipment is able to unambiguously recognize INFO\ 1, or if the master timing mode equipment does not use the MPH\(hyDEACTIVATE REQUEST primitive, then the value of T2 may be 0. .LP \fINote\ 3\fR \ \(em\ Timer\ 4\ (T4) is a supervisory timer which provides time for the slave timing mode equipment(s) to recognize the multiframe identification signal and reply. If no reply is received before T4 times out, connection to an I\(hyseries TE is assumed. The value of T4 is provisionally 50\ ms. T} .TE .nr PS 9 .RT .ad r \fBTableau 4/V.230 [2T4.230], p.\fR .sp 1P .RT .ad b .RT .sp 1P .LP 6.3 \fIFrame alignment procedures\fR .sp 9p .RT .PP The first bit of each frame is the framing bit, \fIf\fR ; it is a binary ZERO. .PP The frame alignment procedure makes use of the fact that the framing bit is represented by a pulse having the same polarity as the preceding pulse (line code violation). This allows rapid reframing. .PP According to the coding rule, both the framing bit and the first binary ZERO bit following the framing balance bit (in the same frame) produce a line code violation. To guarantee secure framing, the auxiliary framing bit pair F\dA\uand N in the direction master\(hyto\(hyslave or the auxiliary framing bit F\dA\uwith the associated balancing bit\ L in the direction slave\(hyto\(hymaster are introduced. This ensures that there is a line code violation at 14\ bits or less from the framing bit F, due to F\dA\uor N being a binary ZERO bit (master\(hyto\(hyslave) or to F\dA\ubeing a binary ZERO bit (slave\(hyto\(hymaster) if the F\dA\ubit position is not used as a Q\ bit. The framing procedures do not depend on the polarity of the framing bit\ F, and thus are not sensitive to wiring polarity. .PP The coding rule for the auxiliary framing bit pair F\dA\uand N, in the direction master\(hyto\(hyslave, is such that N is the binary opposite of F\dA\u(N\ =\ F\dA\u). The F\dA\uand L\ bits in the direction slave\(hyto\(hymaster are always coded such that the binary values of F\dA\uand L are equal. .RT .sp 1P .LP 6.3.1 \fIFrame alignment procedure in the direction master\(hyto\(hyslave\fR \fIto slave timing mode equipment\fR .sp 9p .RT .PP Frame alignment, on initial activation of the slave mode equipment, shall comply with the procedures defined is \(sc\ 6.2. .bp .RT .sp 1P .LP 6.3.1.1 \fILoss of frame alignment\fR .sp 9p .RT .PP Loss of frame alignment may be assumed when a time period equivalent to two 48\(hybit frames has elapsed without having detected valid pairs of line code violations obeying the \(=\|14\ bit criterion as described above. The slave timing mode equipment shall cease transmission immediately. .RT .sp 1P .LP 6.3.1.2 \fIFrame alignments\fR .sp 9p .RT .PP Frame alignment may be assumed to occur when three consecutive pairs of line code violations obeying the \(=\|14\ bit criterion have been detected. .RT .sp 1P .LP 6.3.2 \fIFrame alignment in the direction slave\(hyto\(hymaster timing\fR \fImode equipment\fR .sp 9p .RT .PP The criterion of a line code violation at 13 bits or less from the framing bit (F) shall apply except if the Q\ channel (see \(sc\ 6.3.3) is provided, in which case the 13\(hybit criterion applies in four out of five frames. .RT .sp 1P .LP 6.3.2.1 \fILoss of frame alignment\fR .sp 9p .RT .PP The master mode equipment may assume loss of frame alignment if a time equivalent to at least two 48\(hybit frames has elapsed since detecting consecutive violations according to the 13\(hybit criterion, if all F\dA\ubits have been set to binary ZERO. Otherwise, a time period equivalent to at least three 48\(hybit frames shall be allowed before assuming loss of frame alignment. On detection of loss of frame alignment, the master equipment shall continue transmitting towards the slave equipment. .RT .sp 1P .LP 6.3.2.2 \fIFrame alignment\fR .sp 9p .RT .PP The master timing mode equipment may assume that frame alignment has been regained when three consecutive pairs of line code violations obeying the 13\(hybit criterion has been detected. .RT .sp 1P .LP 6.3.3 \fIMulti\(hyframing\fR .sp 9p .RT .PP A multi\(hyframe described in the following paragraphs is intended to provide extra layer\ 1 capacity in the slave\(hyto\(hymaster direction through the use of an extra channel between the slave and master equipment (Q\ channel) . .PP The use of the Q bits shall be the same in point\(hyto\(hypoint as in point\(hyto\(hymultipoint configurations. Future standardization for the use of Q\ bits is for further study. (There is no inherent collision detection mechanism provided, and any collision detection mechanism that is required for any application of the Q\ bits will be outside the scope of this Recommendation.) .RT .sp 1P .LP 6.3.3.1 \fIGeneral mechanism\fR \v'3p' .sp 9p .RT .LP a) Q bit identication: The Q bits (slave mode to master mode equipment) are defined to be the bits in the F\dA\ubit position of every fifth frame. The Q\ bit positions in the slave\(hyto\(hymaster direction are identified by binary inversions of the F\dA\u/N bit pair (F\dA\u\ =\ binary ONE, N\ =\ binary ZERO) in the master\(hyto\(hyslave direction. The provison for identification of the Q\(hybit positions in the master\(hyto\(hyslave direction permits all slave mode equipment to synchronize transmission in Q\(hybit positions, thereby avoiding interference of F\dA\ubits from one equipment with the Q\ bits of a second equipment in passive bus configurations. .LP b) Multi\(hyframe identification: A multi\(hyframe, which provides for structuring the Q\ bits in groups of four (Q1\(hyQ4), is established by setting the M\ bit, in position\ 26 of the master\(hyto\(hyslave frame, to binary ONE in every twentieth frame. This structure provides for 4\(hybit characters in a single channel, slave\(hyto\(hymaster. .sp 1P .LP 6.3.3.2 \fIQ\(hybit position identification algorithm\fR .sp 9p .RT .PP The Q\(hybit position identification algorithm is illustrated in Table\ 5/V.230. Two examples of how such an identification algorithm can be realized are as follows. The slave mode equipment Q\(hybit identification algorithm may be simply the transmission of a Q\(hybit in each frame in which a binary ONE is received in the F\dA\u\(hybit position of the master\(hyto\(hyslave frame (i.e.,\ echoing of the received F\dA\ubits). Alternatively, to minimize the Q\(hybit transmission .bp .PP errors that could result from errors in the F\dA\ubits of master\(hyto\(hyslave frames, a slave mode equipment may synchronize a frame counter to the Q\(hybit rate and transmit Q\ bits in every fifth frame, i.e.,\ in frames in which F\dA\ushould be present. Q\ bits would be transmitted only after counter synchronization to the binary ONEs in the F\dA\u\ bit positions of the master\(hyto\(hyslave frames is achieved (and only if such bits are received). .PP When the counter is not synchronized (not achieved or lost), a slave mode equipment which uses such an algorithm shall transmit binary ZEROs in Q\(hybit positions. The algorithm used by a slave mode equipment to determine when synchronization is defined to be achieved or the algorithm used to determine when it is defined to be lost is not described in this Recommendation. .PP No special Q\(hybit identification is required in the master mode equipment because the maximum round trip delay of the master\(hyto\(hyslave\(hyto\(hymaster is a small fraction of a frame, and therefore, Q\(hybit identification is inherent in the master timing mode equipment. .RT .LP .sp 1 .ce \fBH.T. [T5.230]\fR .ce TABLE\ 5/V.230 .ce \fBQ\(hybit position identification and multiframe .ce structure\fR .ps 9 .vs 11 .nr VS 11 .nr PS 9 .TS center box; cw(48p) | cw(60p) | cw(60p) | cw(60p) . Frame number T{ MASTER TO SLAVE F A bit position T} T{ SLAVE TO MASTER F A bit position (1, 2) T} MASTER TO SLAVE M bit _ .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . \ 1 ONE Q1 ONE .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . \ 2 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . \ 3 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . \ 4 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . \ 5 ZERO ZERO ZERO _ .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . \ 6 ONE Q2 ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . \ 7 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . \ 8 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . \ 9 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . 10 ZERO ZERO ZERO _ .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . 11 ONE Q3 ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . 12 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . 13 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . 14 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . 15 ZERO ZERO ZERO _ .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . 16 ONE Q4 ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . 17 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . 18 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . 19 ZERO ZERO ZERO .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . 20 ZERO ZERO ZERO _ .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . \ 1 ONE Q1 ONE .T& cw(48p) | cw(60p) | cw(60p) | cw(60p) . \ 2 ZERO ZERO ZERO .TE .LP \fINote\ 1\fR \ \(em\ If the Q bits are not used by a slave mode equipment, the Q bits shall be set to binary ONE. .LP \fINote\ 2\fR \ \(em\ Where multiframe identification is not provided with a binary ONE in an appropriate M bit, but where Q\(hybit positions are identified, Q bits 1 through 4 are not distinguished. .nr PS 9 .RT .ad r \fBTable\ 5/V.230 [T5.230], p.\fR .sp 1P .RT .ad b .RT .LP .bp .sp 1P .LP 6.3.3.3 \fISlave timing mode equipment multiframe identification\fR .sp 9p .RT .PP The first frame of the multiframe is identified by the M bit equal to a binary ONE. Slave mode equipment shall use the M\ bit equal to a binary ONE to identify the start of the multiframe. .PP The algorithm used by a slave mode equipment to determine when synchronization or loss of synchronization of the multiframe is achieved is not described in this Recommendation. .RT .sp 1P .LP 6.3.4 \fIS channel structuring algorithm\fR .sp 9p .RT .PP The algorithm for structuring the S bits (master\(hyto\(hyslave frame bit position 37) into an S channel uses the same combination of the F\dA\ubit inversions and the M\ bit that is used to structure the Q\ channel as described in \(sc\ 6.3.3. The S\ channel structure, shown in Table\ 6/V.230, provides for five subchannels, SC1 through SC5. Each subchannel SCn is comprised of the bits SCn1 through SCn4 which provides for the transfer of one 4\(hybit character per multiframe (5\ ms). This Recommendation discusses the use of subchannel\ SC1 only. Subchannels SC2 through SC5 are reserved for future use, and shall be coded with all binary ZEROs. The coding and use of the 4\(hybit character of SC1 are discussed in \(sc\ 6.2.7. .RT .LP .sp 2 .ce \fBH.T. [T6.230]\fR .ce TABLE\ 6/V.230 .ce \fBS\(hychannel structure\fR .ps 9 .vs 11 .nr VS 11 .nr PS 9 .TS center box; cw(42p) | cw(36p) | cw(36p) | cw(36p) . Frame number F A bit M bit S bit _ .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . \ 1 ONE Q1 SC11 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . \ 2 ZERO ZERO SC21 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . \ 3 ZERO ZERO SC31 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . \ 4 ZERO ZERO SC41 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . \ 5 ZERO ZERO SC51 _ .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . \ 6 ONE ZERO SC12 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . \ 7 ZERO ZERO SC22 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . \ 8 ZERO ZERO SC32 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . \ 9 ZERO ZERO SC42 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . 10 ZERO ZERO SC52 _ .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . 11 ONE ZERO SC13 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . 12 ZERO ZERO SC23 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . 13 ZERO ZERO SC33 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . 14 ZERO ZERO SC43 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . 15 ZERO ZERO SC53 _ .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . 16 ONE ZERO SC14 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . 17 ZERO ZERO SC24 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . 18 ZERO ZERO SC34 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . 19 ZERO ZERO SC44 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . 20 ZERO ZERO SC54 _ .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . \ 1 ONE ONE SC11 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . \ 2 ZERO ZERO SC21 .T& cw(42p) | cw(36p) | cw(36p) | cw(36p) . etc. .TE .LP \fINote\fR \ \(em\ Subchannels SC2 through SC5 are reserved for future standardization and are set to all binary ZEROs. .nr PS 9 .RT .ad r \fBTable\ 6/V.230 [T6.230], p.\fR .sp 1P .RT .ad b .RT .LP .bp .sp 1P .LP 6.4 \fIIdle channel code on the BV channels\fR .sp 9p .RT .PP A slave mode equipment shall send binary ONEs in any BV channel which is not assigned to it. .RT .sp 2P .LP \fB7\fR \fBLayer 1 maintenance\fR .sp 1P .RT .PP Test loopbacks, similar to those defined in Recommendation I.430, are for further study. .RT .LP \fB8\fR \fBElectrical characteristics\fR .sp 1P .RT .sp 2P .LP 8.1 \fIBit rate\fR .sp 1P .RT .sp 1P .LP 8.1.1 \fINominal rate\fR .sp 9p .RT .PP The nominal bit rate is 192 kbit/s. .RT .sp 1P .LP 8.1.2 \fITolerance\fR .sp 9p .RT .PP The tolerance (free running mode) is \(+-\|100 ppm. .RT .sp 2P .LP 8.2 \fIJitter and bit\(hyphase relationship between slave mode\fR \fIequipment input and output\fR .sp 1P .RT .sp 1P .LP 8.2.1 \fITest configurations\fR .sp 9p .RT .PP The jitter and phase deviation measurements are carried out with four different waveforms at the slave mode equipment input, in accordance with the following configurations: .RT .LP i) point\(hyto\(hypoint configuration with 6 dB attenuation measured between the two terminating resistors at 96\ kHz (high capacitance cable); .LP ii) short passive bus with 8 units (including the unit under test) clustered at the far end from the signal source (high capacitance cable); .LP iii) a) and b) short passive bus with the unit under test adjacent to the signal source and the other seven units clustered at the far\(hyend from the signal source (high and low capacitance cable); .LP iv) ideal test signal condition, with one source connected directly to the receiver of the unit under test (i.e.,\ without artificial line). .PP Examples of waveforms that correspond to the configurations i), ii), iiia) and\ iiib) are given in Figures\ 5/V.230\ to 8/V.230. Test configurations which can generate these signals are given in Annex\ C. .LP .rs .sp 19P .ad r \fBFigure 5/V.230, p. 14\fR .sp 1P .RT .ad b .RT .LP .bp .LP .rs .sp 24P .ad r \fBFigure 6/V.230, p. 15\fR .sp 1P .RT .ad b .RT .LP .rs .sp 24P .ad r \fBFigure 7/V.230, p. 16\fR .sp 1P .RT .ad b .RT .LP .bp .LP .rs .sp 21P .ad r \fBFigure 8/V.230, p. 17\fR .sp 1P .RT .ad b .RT .sp 1P .LP 8.2.2 \fITiming extraction jitter\fR .sp 9p .RT .PP Timing extraction jitter, as observed at the slave mode equipment output, shall be within \(em7%\ to +7% of a bit period, when the jitter is measured using a high pass filter with a cut\(hyoff frequency (3\ dB point) of 30\ Hz under the test conditions described in \(sc\ 8.2.1. The limitation applies with an output data sequence having binary ZEROs in both BV\ channels and with input data sequences described in a)\ to c) following. The limitation applies to the phase of all zero\(hyvolt crossings of all adjacent binary ZEROs in the output data sequence. .RT .LP a) A sequence consisting of continuous frames with all binary ONEs in DV, DV\(hyecho and both BV channels. .LP b) A sequence, repeated continuously for at least 10 seconds, consisting of: .LP \(em 40 frames with continuous octets of \*Q10101010\*U (the first bit to be transmitted is binary ONE) in both BV\ channels and continuous binary ONEs in DV and DV\(hyecho channels followed by: .LP \(em 40 frames with continuos binary ZEROs in DV, DV\(hyecho and both BV channels. .LP c) A sequence consisting of a pseudo\(hyrandom pattern with a length of 2\u1\d\u9\d\ \(em\ 1 in DV, DV\(hyecho and both BV\ channels. (This pattern may be generated with a shift register with 19\ stages with the outputs of the first, the second, the fifth and the nineteenth stages added together (modulo\ 2) and fed back to the input.) .sp 1P .LP 8.2.3 \fITotal phase deviation, input to output\fR .sp 9p .RT .PP The total phase deviation (including effects of timing extraction in the slave mode equipment), between the transitions of signal elements at the output of the slave mode equipment and the transitions of signal elements associated with the signal applied to the input, should not exceed the range of \(em7%\ to +15% of a bit period. This limitation applies to the output signal transitions of each frame with the phase reference defined as the average phase of the crossing of zero volts which occurs between the framing pulse and its associated balance pulse at the start of the frame and the corresponding crossings at the start of the three preceding frames of the input signal. .PP For the purposes .bp .PP of demonstrating compliance of an equipment, it is sufficient to use (as the input signal phase reference) only the crossing of zero volts between the framing pulse and its associated balance pulse of the individual frame. This latter method, requiring a simpler test set, may create additional jitter at frequencies higher than about 1\ kHz and is therefore more restrictive. The limitation applies to the phase of the zero\(hyvolt crossings of all adjacent binary ZEROs in the output data sequence, which shall be as defined in \(sc\ 8.2.2. The limitation applies under all test conditions described in \(sc\ 8.2.1, with the additional input signal conditions specified in a)\ to d) following, and with superimposed jitter as specified in Figure\ 9/V.230 over the range of frequencies from 5\ Hz\ to 2\ kHz. The limitation applies for input bit rates of 192\ kbit/s\|\(+-\|100\ ppm. .RT .LP a) A sequence consisting of continuous frames with all binary ONEs in the DV, DV\(hyecho and both BV channels. .LP b) A sequence consisting of continuous frames with the octet \*Q10101010\*U (the first bit to be transmitted is binary ONE) in both BV\ channels and binary ONEs in DV and DV\(hyecho channels. .LP c) A sequence of continuous frames with binary ZEROs in DV, DV\(hyecho and both BV\ channels. .LP d) A sequence of continuous frames with a pseudo\(hyrandom pattern, as described in \(sc\ 8.2.2\ c), in DV, and both BV\ channels. .LP .rs .sp 14P .ad r \fBFigure\ 9/V.230, p.\fR .sp 1P .RT .ad b .RT .sp 1P .LP 8.3 \fIMaster mode equipment jittter characteristics\fR .sp 9p .RT .PP The maximum jitter (peak\(hyto\(hypeak) in the output sequence of a master mode equipment shall be 5% of a bit period when measured using a high pass filter having a cut\(hyoff frequency (3\ dB point) of 50\ Hz and an asymptotic roll off 20\ dB per decade. The limitation applies for all data sequences, but for the purpose of demonstrating the compliance of an equipment, it is sufficient to measure jitter with output data sequence consisting of binary ONEs in DV and BV\ channels and with additional sequence as described in \(sc\ 8.2.2.\ c) in DV and BV\ channels. The limitation applies to the phase of all\(hyzero volt crossings of all adjacent binary ZEROs in the output data sequence. .RT .sp 1P .LP 8.4 \fITermination of the line\fR .sp 9p .RT .PP The interchange circuit pair termination (resistive) should be 100\ ohms \(+-\|5% (see Figure\ 2/V.230). .RT .sp 2P .LP 8.5 \fITransmitter output characteristics\fR .sp 1P .RT .sp 1P .LP 8.5.1 \fITransmitter output impedance\fR .sp 9p .RT .PP The following requirements apply at interface point I\dA\u(see Figure\ 2/V.230 for slave mode equipment) and at interface point I\dB\ufor master mode equipment (see \(sc\(sc\ 4.5\ and 8.9 regarding cordage capacitance). .bp .RT .sp 1P .LP 8.5.1.1 \fIMaster mode equipment transmitter output impedance\fR \v'3p' .sp 9p .RT .LP a) When inactive or transmitting a binary ONE, the output impedance, in the frequency range of 2\ kHz to 1\ MHz, shall exceed the impedance indicated by the template in Figure\ 10/V.230. The requirement is applicable with an applied sinusoidal voltage of at least 100\ mV (r.m.s. value). .LP \fINote\fR \ \(em\ In some applications, the terminating resistor can be combined with the master mode equipment (see point\ B of Figure\ 2/V.230). The resulting impedance is the impedance needed to exceed the combination of the template and the 100\(hyohm termination. .LP b) When terminating a binary ZERO, the output impedance shall be \(>="\|20\ ohms. .LP \fINote\fR \ \(em\ The output impedance limit shall apply for two nominal load impedance (resistive) conditions: 50\ ohms and 400\ ohms. The output impedance for each nominal load shall be defined by determining the peak pulse amplitude for loads equal to the nominal value \(+-\|10%. The peak amplitude shall be defined as the amplitude at the midpoint of a pulse. The limitation applies for pulses of both polarities. .LP .rs .sp 20P .ad r \fBFigure\ 10/V.230, p.\fR .sp 1P .RT .ad b .RT .sp 1P .LP 8.5.1.2 \fISlave mode equipment transmitter output impedance\fR \v'3p' .sp 9p .RT .LP a) In the inactive and powered down states or when transmitting a binary ONE, the following requirements apply: .LP i) the output impedance, in the frequency range of 2\ kHz to 1\ MHz, should exceed the impedance indicated by the template in Figure\ 11/V.230. This requirement is applicable with an applied sinusoidal voltage of at least 100\ mV (r.m.s. value); .LP ii) at a frequency of 96 kHz, the peak current which results from an applied voltage of up to 1.2\ V (peak value) should not exceed 0.6\ mA (peak value). .LP b) When transmitting a binary ZERO, the output impedance shall be \(>="\|20\ ohms. .LP \fINote\fR \ \(em\ The output impedance limit shall apply for two nominal load impedance (resistive) conditions: 50\ ohms and 400\ ohms. The output impedance for each nominal load shall be defined by determining the peak pulse amplitude for loads equal to the nominal value \(+-\|10%. The peak amplitude shall be defined as the amplitude at the midpoint of a pulse. The limitation applies for pulses of both polarities. .bp .LP .rs .sp 15P .ad r \fBFigure\ 11/V.230, p.\fR .sp 1P .RT .ad b .RT .sp 1P .LP 8.5.2 \fITest load impedance\fR .sp 9p .RT .PP The test load impedance shall be 50 ohms (unless otherwise indicated). .RT .sp 2P .LP 8.5.3 \fIPulse shape and amplitude (binary ZERO)\fR .sp 1P .RT .sp 1P .LP 8.5.3.1 \fIPulse shape\fR .sp 9p .RT .PP Except for overshoot, limited as follows, pulses shall be within the mask of Figure\ 12/V.230. Overshoot, at the leading edge of pulses, of up to 5% of the pulse amplitude at the middle of a signal element, is permitted, provided that such overshoot has, at 1/2 of its amplitude, a duration of less than\ 0.25\ \(*ms. .RT .sp 1P .LP 8.5.3.2 \fINominal pulse amplitude\fR .sp 9p .RT .PP The nominal pulse amplitude shall be 750 mV, zero to peak. .PP A positive pulse (in particular, a framing pulse) at the output port of master mode and slave mode equipment is defined as a positive polarity of the voltage measured between access leads\ e\ to f and d\ to c respectively (see Figure\ 20/I.430). (See Table\ 7/V.230 for the relationship to connector pins.) .RT .sp 1P .LP 8.5.4 \fIPulse unbalance\fR .sp 9p .RT .PP The \*Qpulse unbalance\*U, i.e., the relative difference in \(is\fIU\fR (\fIt\fR ) d\fIt\fR for positive pulses and \(is\fIU\fR (\fIt\fR ) d\fIt\fR for negative pulses shall be\ \(=\|5%. .RT .sp 1P .LP 8.5.5 \fIVoltage on other test loads (slave mode equipment)\fR .sp 9p .RT .PP The following requirements are intended to assure compatibility with the condition where multiple slave mode equipments are simultaneously transmitting pulses on to a passive bus. .RT .sp 1P .LP 8.5.5.1 \fI400\(hyohm load\fR .sp 9p .RT .PP A pulse (binary ZERO) shall conform to the limits of the mask shown in Figure\ 13/V.230 when the transmitter is terminated in a 400\(hyohm load. .bp .RT .LP .rs .sp 47P .ad r \fBFigure\ 12/V.230, p.\fR .sp 1P .RT .ad b .RT .LP .bp .LP .rs .sp 47P .ad r \fBFigure\ 13/V.230, p.\fR .sp 1P .RT .ad b .RT .LP .bp .sp 1P .LP 8.5.5.2 \fI5.6\(hyohm load\fR .sp 9p .RT .PP To limit the current flow with two drivers having opposite polarities, the pulse amplitude (peak) with a 5.6\(hyohm load shall be \(=\|20% of the nominal pulse amplitude. .RT .sp 1P .LP 8.5.6 \fIUnbalance about earth\fR .sp 9p .RT .PP The following requirements apply under all possible power feeding conditions, under all possible connections of the equipment to ground, and with two 100\(hyohm terminations across the transmit and receive ports. .RT .sp 1P .LP 8.5.6.1 \fILongitudinal conversion loss\fR .sp 9p .RT .PP Longitudinal conversion loss (LCL), which is measured in accordance with Recommendation\ G.117, \(sc\ 4.1.3 (see Figure\ 14/V.230), shall meet the following requirements: .RT .LP a) 10 kHz < \fIf\fR \(= 300 kHz: \(>=" 54 dB .LP b) 300 kHz < \fIf\fR \(= 1 MHz: minimum value decreasing from 54 dB at 20 dB/decade. .LP .rs .sp 40P .ad r \fBFigure 14/V.230, p. 23\fR .sp 1P .RT .ad b .RT .LP .bp .sp 1P .LP 8.5.6.2 \fIOutput signal balance\fR .sp 9p .RT .PP Output signal balance which is measured in accordance with Recommendation\ G.117, \(sc\ 4.3.1 (see Figure\ 15/V.230), shall meet the following requirements: .RT .LP a) \fIf\fR \(em 96 kHz: \(>="\|54 dB .LP b) 96 kHz < \fIf\fR \(= 1 MHz: minimum value decreasing from 54 dB at 20\ dB/decade. .LP .rs .sp 33P .ad r \fBFigure\ 15/V.230, p.\fR .sp 1P .RT .ad b .RT .LP 8.6 \fIReceiver input characteristics\fR .sp 1P .RT .sp 2P .LP 8.6.1 \fIReceiver input imbalance\fR .sp 1P .RT .sp 1P .LP 8.6.1.1 \fISlave mode equipment receiver input impedance\fR .sp 9p .RT .PP Slave mode equipment shall meet the same input impedance requirements as specified in \(sc\ 8.5.1.2\ a) for the output impedance. .bp .RT .sp 1P .LP 8.6.1.2 \fIMaster mode equipment\fR \fIreceiver input impedance\fR .sp 9p .RT .PP In the inactive and powered\(hydown states, the following requirements apply: .RT .LP i) The input impedance in the frequency range of 2 kHz to 1 MHz, should exceed the impedance indicated by the template in Figure\ 11/V.230. This requirement is applicable with an applied sinusoidal voltage of at least 100\ mV (r.m.s. value). .LP ii) At a frequency of 96 kHz, the peak current which results from an applied voltage of up to 1.2\ V (peak value) should not exceed 0.5\ mA (peak value). .PP \fINote\fR \ \(em\ In some applications, the 100\(hyohm terminating resistor can be combined with the master mode equipment (see point\ B of Figure\ 2/V.230). .LP The resulting impedance is the impedance needed to exceed the combination of the template and the 100\(hyohm termination. .sp 1P .LP 8.6.2 \fIReceiver sensitivity \(em noise and distortion immunity\fR .sp 9p .RT .PP Requirements applicable to the equipments for three different interface wiring configurations are given in the following sub\(hyparagraphs. Equipment shall receive, without errors (for a period of at least one minute), an input with a pseudo\(hyrandom sequence (word length \(>="\|511\ bits) in all information channels (combination of BV\ channel, DV\ channel and, if applicable, the DV\(hyecho channel). .PP The receiver shall operate, with any input sequence, over the full range indicated by the waveform mask. .RT .sp 1P .LP 8.6.2.1 \fISlave mode equipment\fR .sp 9p .RT .PP Slave mode equipment shall operate with the input signals conforming to the waveforms specified in \(sc\ 8.2.1. For the waveforms in Figures\ 6/V.230\ to 8/V.230, slave mode equipment shall operate with the input signals having any amplitude in the range of +1.5\ dB relative to the nominal amplitude of the transmitted signal as specified in \(sc\ 8.5.3.2. .PP For signals conforming to the waveform in Figure\ 5/V.230, operation shall be accomplished for signals having any amplitude in the range of +1.5 to \(em7.5\ dB relative to the nominal amplitude of the transmitted signal as specified in \(sc\ 8.5.3.2. Additionally, the slave mode equipment shall operate with sinusoidal signals having an amplitude of 100\ mV (peak\(hyto\(hypeak value) at frequencies of 200\ kHz and 2\ MHz superimposed individually on the input signals having the waveform shown in Figure\ 5/V.230. .RT .sp 1P .LP 8.6.2.2 \fIMaster mode equipment for short passive bus (fixed timing)\fR .sp 9p .RT .PP Master mode equipment designed to operate with only short passive bus wiring configurations shall operate when receiving input signals indicated by the waveform shown in Figure\ 16/V.230. Master mode equipment shall operate, with the input signals having any amplitude in the range of +1.5\ dB\ to \(em3.5\ dB relative to the nominal amplitude of the transmitted signal as specified in \(sc\ 8.5.3.2. .RT .sp 1P .LP 8.6.2.3 \fIMaster mode equipment for both point\(hyto\(hypoint and short\fR \fIpassive bus configurations (adaptive timing)\fR .sp 9p .RT .PP Master mode equipment designed to operate with either point\(hyto\(hypoint or short passive bus wiring configurations shall operate when receiving input signals indicated by the waveform mask shown in Figure\ 17/V.230. These master mode equipments shall operate with the input signals having any amplitude in the range of +1.5\ dB to \(em3.5\ dB relative to the nominal amplitude of the transmitted signal as specified in \(sc\ 8.5.3.2. These master mode equipments shall also operate when receiving signals conforming to the waveform in Figure\ 5/V.230. For signals conforming to this waveform, operation shall be accomplished for signals having any amplitude in the range of +1.5\ to \(em7.5\ dB relative to the nominal amplitude of the transmitted signal as specified in \(sc\ 8.5.3.2. Additionally, these master mode equipments shall operate with the sinusoidal signals, as specified in \(sc\ 8.6.2.1, superimposed on the input signals having the waveform in Figure\ 5/V.230. .bp .RT .LP .rs .sp 47P .ad r \fBFigure\ 16/V.230, p.\fR .sp 1P .RT .ad b .RT .LP .bp .LP .rs .sp 33P .ad r \fBFigure 17/V.230, p.\fR .sp 1P .RT .ad b .RT .sp 1P .LP 8.6.2.4 \fIMaster mode equipment for extended passive bus wiring\fR \fIconfigurations\fR .sp 9p .RT .PP Master mode equipment designed to operate with extended passive bus wiring configurations shall operate when receiving input signals indicated by the waveform mask shown in Figure\ 18/V.230. These master mode equipments shall operate with the input signals having any amplitude in the range of +1.5\ dB to \(em5.5\ dB relative to the nominal amplitude of the transmitted signal as specified in \(sc\ 8.5.3.2. Additionally, these master mode equipments shall operate with the sinusoidal signals, as specified in \(sc\ 8.6.2.1, superimposed on the input signals having the waveform shown in Figure 18/V.230. (The above values assume a maximum cable loss of 3.8\ dB. Master mode equipment may be implemented to accommodate higher cable loss.) .RT .sp 1P .LP 8.6.2.5 \fIMaster mode equipment for point\(hyto\(hypoint configurations only\fR .sp 9p .RT .PP Master mode equipment designed to operate with only point\(hyto\(hypoint wiring configurations shall operate when receiving input signals having the waveform shown in Figure\ 5/V.230. These master mode equipments shall operate with the input signals having any amplitude in the range of +1.5 to \(em7.5\ dB relative to the nominal amplitude of the transmitted signal as specified in \(sc\ 8.5.3.2. Additionally, these master mode equipments shall operate with the sinusoidal signals, as specified in \(sc\ 8.6.2.1, superimposed on the input signals having the waveform shown in Figure\ 5/V.230. .bp .RT .LP .rs .sp 33P .ad r \fBFigure 18/V.230, p.\fR .sp 1P .RT .ad b .RT .sp 1P .LP 8.6.3 \fIMaster mode equipment receiver input delay characteristics\fR .sp 9p .RT .PP \fINote\fR \ \(em\ Round trip delay is always measured between the zero\(hyvolt crossings of the framing pulse and its associated balance bit pulse at the transmit and receive sides of the master mode equipment (see also Annex\ A). .RT .sp 1P .LP 8.6.3.1 \fIMaster mode equipment for short passive bus\fR .sp 9p .RT .PP Master mode equipment shall accommodate round trip delays of the complete installation, including slave mode equipment, in the range 10\ to 14\ \(*ms. .RT .sp 1P .LP 8.6.3.2 \fIMaster mode equipment for both point\(hyto\(hypoint and passive bus\fR .sp 9p .RT .PP Master mode equipment shall accommodate round trip delays (for passive bus configurations) in the range 10\ to 13\ \(*ms. .PP Master mode equipment shall accommodate round trip delays (for point\(hyto\(hypoint configurations) in the range 10\ to 42\ \(*ms. .bp .RT .sp 1P .LP 8.6.3.3 \fIMaster mode equipment for extended passive bus\fR .sp 9p .RT .PP \fI\fR Master mode equipment shall accommodate round trip delays in the range 10\ to 42\ \(*ms, provided that the differential delay of signals from different slave mode equipments is in the range 0\ to 2\ \(*ms. .RT .sp 1P .LP 8.6.3.4 \fIMaster mode equipment for point\(hyto\(hypoint only\fR .sp 9p .RT .PP Master mode equipment shall accommodate round trip delays specified in \(sc\ 8.6.3.2 for point\(hyto\(hypoint configurations. .RT .sp 1P .LP 8.6.4 \fIUnbalance about earth\fR .sp 9p .RT .PP Longitudinal conversion loss (LCL) of receiver inputs, measured in accordance with Recommendation\ G.117, \(sc\ 4.1.3, by considering the power feeding and two 100\(hyohm terminations at each port, shall meet the following requirements (see Figure\ 14/V.230): .RT .LP a) 10 kHz \(= \fIf\fR \(= 300 kHz: \(>=" 54 dB .LP b) 300 kHz < \fIf\fR \(= 1 MHz: minimum value decreasing from 54 dB with 20\ dB/decade. .sp 1P .LP 8.7 \fIIsolation from external voltages\fR .sp 9p .RT .PP The electrical environment of interface cable pairs is not specified in this Recommendation. .PP IEC Publication 479\(hy1, Second Issue 1984, specifies current limitations dealing with human safety. According to that publication, the value of a touchable leakage alternating current measured through a resistor of 2\ kOhms is to be limited to 9\ mA. The application of this requirement to the user\(hynetwork interface is not a subject of this Recommendation. .PP It may be necessary to apportion this value between the number of mains powered equipments connected to the passive bus. A possible maximum value of (touchable) leakage alternating current for each mains powered equipment could be 1\ mA. However, it should be noted that leakage current of a fraction of this magnitude may interfere with the satisfactory operation of the equipments. .RT .sp 1P .LP 8.8 \fIInterconnecting media characteristics\fR .sp 9p .RT .PP Longitudinal conversion loss of pairs at 96 kHz shall be \(>=" 43\ dB. .RT .sp 1P .LP 8.9 \fIStandard GDCI access cord\fR .sp 9p .RT .PP A connecting cord designed to connect equipment to a jack on a passive bus cable must meet the requirements specified in Recommendation\ I.430 for the \*Qstandard ISDN basic access TE cord\*U. .RT .sp 2P .LP \fB9\fR \fBPower feeding\fR .sp 1P .RT .PP Power feeding across the General Data Communication Interface is not required by this Recommendation. All equipment should be capable of operating if power is present in accordance with Recommendation\ I.430, \(sc\ 9. In the case of a GDCI application which uses power feed across the interface, power source\ 2 defined in Recommendation\ I.430 should be the first choice, followed by either power source\ 1 or power source\ 3. Any considerations for operation under restricted power conditions are at the discretion of the application. .RT .sp 2P .LP \fB10\fR \fBInterface connector and contact assignments\fR .sp 1P .RT .PP The interface connector and contact assignments are the subject of an ISO standard. Table\ 7/V.230 is reproduced from the Draft International Standard, DIS\ 8877, dated November\ 1985. For the transmit and receive leads, pole numbers\ 3 through\ 6, the polarity indicated is for the polarity of the framing pulses. For the power leads, pole numbers\ 1, 2, 7 and\ 8, the polarity indicated is for the polarity of the d.c. voltages. See Figure\ 20/I.430 for the polarity of power provided in the phantom mode. In that figure, the leads that are lettered a, b, c, d, e, f, g and\ h correspond with pole numbers 1, 2, 3, 6, 5, 4, 7 and\ 8, respectively. .bp .RT .ce \fBH.T. [T7.230]\fR .ce TABLE\ 7/V.230 .ce \fBPole (contact) assignment for 8\(hypole connections .ce (plugs and jacks)\fR .ps 9 .vs 11 .nr VS 11 .nr PS 9 .TS center box; cw(42p) | cw(72p) sw(72p) | cw(42p) , ^ | c | c | ^ . Pole number Function Polarity Slave mode equipment Master mode equipment _ .T& cw(42p) | lw(72p) | lw(72p) | cw(42p) . 1 Power source 3 Power sink 3 + .T& cw(42p) | lw(72p) | lw(72p) | cw(42p) . 2 Power source 3 Power sink 3 \(em .T& cw(42p) | lw(72p) | lw(72p) | cw(42p) . 3 Transmit Receive + .T& cw(42p) | lw(72p) | lw(72p) | cw(42p) . 4 Receive Transmit + .T& cw(42p) | lw(72p) | lw(72p) | cw(42p) . 5 Receive Transmit \(em .T& cw(42p) | lw(72p) | lw(72p) | cw(42p) . 6 Transmit Receive \(em .T& cw(42p) | lw(72p) | lw(72p) | cw(42p) . 7 Power sink 2 Power source 2 \(em .T& cw(42p) | lw(72p) | lw(72p) | cw(42p) . 8 Power sink 2 Power source 2 + .TE .LP \fINote\fR \ \(em\ This reference is only provisional. .nr PS 9 .RT .ad r \fBTable\ 7/V.230 [T7.230], p.\fR .sp 1P .RT .ad b .RT .LP .sp 2 .ce 1000 ANNEX\ A .ce 0 .ce 1000 (to Recommendation V.230) .sp 9p .RT .ce 0 .ce 1000 \fBWiring configurations and round trip delay considerations\fR .sp 1P .RT .ce 0 .ce 1000 \fBused as a basis for electrical characteristics\fR .ce 0 .LP A.1 \fIIntroduction\fR .sp 1P .RT .PP A.1.1 In \(sc 4 of this Recommendation, two major wiring arrangements are identified. These are point\(hyto\(hypoint configuration and a point\(hyto\(hymultipoint configuration using a passive bus. .sp 9p .RT .PP While these configurations may be considered to be the limiting cases for the definition of the interfaces and the design of the associated equipments, other significant arrangements should be considered. .PP A.1.2 The values of overall length, in terms of cable loss and delay assumed for each of the possible arrangements, are indicated below. .sp 9p .RT .PP A.1.3 Figure\ 2/V.230 is a composite of the individual configurations. These individual configurations are shown in this Annex. .sp 9p .RT .LP A.2 \fIWiring configurations\fR .sp 1P .RT .sp 2P .LP A.2.1 \fIPoint\(hyto\(hymultipoint\fR .sp 1P .RT .sp 1P .LP A.2.1.1\ \ The point\(hyto\(hymultipoint wiring configuration identified in \(sc\ 4.2 of this Recommendation may be provided by the \*Qshort passive bus\*U or other configurations such as \*Qextended passive bus\*U. .bp .sp 9p .RT .sp 1P .LP A.2.1.2\ \ \fIShort passive bus\fR (Figure\ A\(hy1/V.230) .sp 9p .RT .PP An essential configuration to be considered is a passive bus in which the slave mode devices may be connected at random points along the full length of the cable. This means that the master mode equipment receiver must cater for pulses arriving with different delays from various terminals. For this reason, the length limit for this configuration is a function of the maximum round trip delay and not of the attenuation. .PP A master mode equipment receiver with fixed timing can be used if the round trip delay is between 10\ to 14\ \(*ms. This relates to a maximum operational distance from the master mode equipment in the order of 100\(hy200\ m (d\d2\uin Figure\ A\(hy1/V.230) [200\ m in the case of a high impedance cable (Z\dc\u\ =\ 150\ ohms) and 100\ m in the case of a low impedance cable (Z\dc\u\ =\ 75\ ohms)]. It should be noted that the slave master equipment connections acts as stubs on the cable, thus reducing the master mode equipment receiver margin over that of a point\(hyto\(hypoint configuration. A maximum number of 8\ slave mode equipments with connections of 10\ m in length are to be accommodated. .PP The range of 10 to 14 \(*ms for the round trip delay is composed as follows. The lower value of 10\ \(*ms is composed of two bits offset delay (see Figure\ 3/V.230) and the negative phase deviation of \(em7% (see \(sc\ 8.2.3). In this case the slave mode equipment is located directly at the master mode equipment. The higher value of 14\ \(*ms is calculated assuming the slave mode equipment is located at the far end of a passive bus. This value is composed of the offset delay between frames of two bits (10.4\ \(*ms), the round trip delay of the unloaded bus installation (2\ \(*ms), the additional delay due to load of the slave mode equipment (i.e., 0,7\ \(*ms) and the maximum delay of the slave mode equipment transmitter according to \(sc\ 8.2.3 (15%\ =\ 0.8\ \(*ms). .RT .LP .rs .sp 22P .ad r \fBFigure\ A\(hy1/V.230, p.\fR .sp 1P .RT .ad b .RT .sp 1P .LP A.2.1.3\ \ \fIExtended passive bus\fR \|(Figure A\(hy2/V.230) .sp 9p .RT .PP A configuration which may be used at an intermediate distance in the order of 100\ m and 1000\ m is known as an extended passive bus. This configuration takes advantage of the fact that terminal connection points are restricted to a grouping at the far end of the cable from the master mode equipment. This places a restriction on the differential distance between slave mode equipments. The differential round trip delay is defined as that between zero\(hyvolt crossings of signals from different slave mode equipments and is restricted to\ 2\ \(*ms. .bp .PP This differential round trip delay is composed of a slave mode equipment differential delay of 22% or 1.15\ \(*ms according to \(sc\ 8.2.3, the round trip delay of the unloaded bus installation of 0.5\ \(*ms (line length: 25\ to 50\ m) and an additional delay due to the load of 4\ slave mode equipments (0.35\ \(*ms). .PP d\d3\udepends on the characteristics of the cable to be used. .PP The objective for this extended passive bus configuration is a total length of at least 500\ m (d\d4\uin Figure\ A\(hy2/V.230) and a differential distance between slave mode equipment connection points of 25\ to 50\ m (d\d3\uin Figure\ A\(hy2/V.230). However, an appropriate combination of the total length, the differential distance between slave mode equipment connection points, and the number of slave mode equipments connected to the cable, may be determined by individual Administrations. .RT .LP .rs .sp 14P .ad r \fBFigure\ A\(hy2/V.230, p.\fR .sp 1P .RT .ad b .RT .sp 1P .LP A.2.2 \fIPoint\(hyto\(hypoint\fR \|(Figure\ A\(hy3/V.230) .sp 9p .RT .PP This configuration provides for one transmitter/receiver only at each end of the cable (see Figure\ A\(hy3/V.230). It is, therefore, necessary to determine the maximum permissible attenuation between the ends of the cable to establish the transmitter output level and the range of receiver input levels. .PP In addition, it is necessary to establish the maximum round trip delay for any signal which must be returned from one end to the other within a specified time period (limited by DV\(hyecho bits). .PP A general objective for the operational distance between equipment units is 1.0\ km (d\d1\uin Figure\ A\(hy3/V.230). It is agreed to satisfy this general objective with a maximum cable attenuation of 6\ dB at 96\ kHz. The round trip delay is between 10\ to 42\ \(*ms. .RT .LP .rs .sp 12P .ad r \fBFigure\ A\(hy3/V.230, p.\fR .sp 1P .RT .ad b .RT .LP .bp .PP The lower value of 10 \(*ms is derived in the same way as for the passive bus configuration. The upper value is composed of the following elements: .LP \(em 2 bits due to frame offset (2 \(mu 5.2 \(*ms = 10.4 \(*ms, see \(sc\ 5.4.2.3); .LP \(em maximum 6 bits delay permitted due to the distance between master and slave devices and the required processing time (6\ \(mu\ 5.2\ \(*ms\ =\ 31.2\ \(*ms); .LP \(em the fraction (+15%) of a bit period due to phase deviation between slave mode equipment input and output (see \(sc\ 8.2.3, 0.15\ \(mu\ 5.2\ \(*ms\ =\ 0.8\ \(*ms). .PP It should be noted that an adaptive timing device at the receiver is required at the master mode equipment to meet these limits. .PP For the master mode equipment used for point\(hyto\(hypoint and passive bus configurations (see \(sc\ 8.6.3.2), the tolerable round trip delay in passive bus wiring configurations is reduced to 13\ \(*ms due to the extra tolerance required for the adaptive timing. Using this type of wiring configuration, it is also possible to provide point\(hyto\(hymultipoint mode of operation at layer\ 1. .PP \fINote\fR \ \(em\ Point\(hyto\(hymultipoint operation can be accommodated using only point\(hyto\(hypoint wiring. One suitable arrangement is STAR illustrated in Figure\ A\(hy4/V.230. In such an implementation, bit streams from slave mode equipments must be buffered to provide for operation of the DV\(hyecho channel(s) to provide for contention resolution, but only layer\ 1 functionality is required. It is also possible to support passive bus wiring configurations on the ports of STARs. .RT .LP .rs .sp 33P .ad r \fBFigure\ A\(hy4/V.230, p.\fR .sp 1P .RT .ad b .RT .LP .bp .ce 1000 ANNEX\ B .ce 0 .ce 1000 (to Recommendation V.230) .sp 9p .RT .ce 0 .ce 1000 \fBSDL representation of a possible implementation\fR \fBof the DV\(hychannel access\fR .sp 1P .RT .ce 0 .LP .rs .sp 47P .ad r \fBDiagramme B\(hy1/V.230\fR .sp 1P .RT .ad b .RT .LP .bp .ce 1000 ANNEX\ C .ce 0 .ce 1000 (to Recommendation V.230) .sp 9p .RT .ce 0 .ce 1000 \fBTest configurations\fR .sp 1P .RT .ce 0 .PP In \(sc 8 of this Recommendation, waveforms are shown for testing master and slave mode equipment. This Annex describes configurations, for testing slave mode equipment, which can be used to generate these waveforms (see Figure\ C\(hy1/V.230). Similar configurations can be used to test master mode equipment. .sp 1P .RT .PP Table\ C\(hy1/V.230 gives the parameters for the artificial lines reproduced in Figure\ C\(hy1/V.230. The artificial lines are used to derive the waveforms. For test configurations\ ii) and\ iii), the cable length used corresponds to a signal delay of 1\ \(*ms. .LP .rs .sp 40P .ad r \fBFigure\ C\(hy1/V.230, p.\fR .sp 1P .RT .ad b .RT .LP .bp .ce \fBH.T. [T8.230]\fR .ce TABLE C\(hy1/V.230 .ce \fBParameters for the artificial lines .ps 9 .vs 11 .nr VS 11 .nr PS 9 .TS center box; cw(60p) | cw(60p) | cw(60p) . Parameters High capacitance cable Low capacitance cable _ .T& lw(60p) | cw(60p) | cw(60p) . R (96 kHz) 160 ohms/km 160 ohms/km .T& lw(60p) | cw(60p) | cw(60p) . C (1 kHz) 120 nF/km 30 nF/km .T& lw(60p) | cw(60p) | cw(60p) . Zo (96 kHz) 75 ohms 150 ohms .T& lw(60p) | cw(60p) | cw(60p) . Wire diameter 0.6 mm 0.6 mm _ .TE .nr PS 9 .RT .ad r \fBTable\ C\(hy1/V.230 [T8.230], p.\fR .sp 1P .RT .ad b .RT .LP .rs .sp 37P .ad r Blanc .ad b .RT .LP .bp